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Using Multisim. ( Do not answer question 4) only 3 & 5 Question 3: Simulate your each of the gate design (developed in Question 2

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Question 3: Simulate your each of the gate design (developed in Question 2 in ModelSim and determine experimentally the truth tables for all the following gates. (25 points) Question 4: Write a single separate VHDL code for all the following gates and simulate in ModelSim. (25 points) a.And b. OR c. XOR d. NOT e. NAND, f. NOR, g. XNOR Question 5: Write a VHDL code to implement the following circuits. Use your AND gate as a component built-in Question 1. (25 points) f=XY+YZ+ZX Question 1: Draw the following gates using Multisim and write down the truth table. (25 points) oa.And b. OR c. XOR Question 2. Write a separate VHDL code for all the following gates. (using multiple bits/single bit inputs) (25 points) oa.And b. OR c. XOR

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