Using the structural Verilog module, below left, as a pattern, write a structural Verilog description of the circuit diagrammed on the right. module decoder2to4stV(En, A0, A1, Don, D1n, D2n, D3n); ------ ---- 1nput E_n, A0, A1; output Do_n, Dl_n, D2_n, D3_ni wire AO n, Al n not go (AO_n, AO) . gl (A1n, A1) nand g4 (D1_n, A0, A1 n, E) g6 (D3_n, A0, A1, B) endmodule Structural Vog Description of a 2-to-4 Line Decoder