Using Vivado

Prelab: Refer to the truth-table of Lab 6 and Lab 7. Write a VHDL module and design a circuit that will display either the sum or the product of two bit binary numbers according to the value of a separate Addition/Multiplication switch. The result will be displayed on a seven segment display. Derive the equation for each output in SOP form. Drive the inputs of the decoder with outputs from the Basys 3. LAB 7 A8 x B A oo0 0002 0100 o 1 01 o 01 0 0 1lo OI I IIO0 010 0 LI. 1 01 1 100 O { 100 0000 00 LOD l Prelab: Refer to the truth-table of Lab 6 and Lab 7. Write a VHDL module and design a circuit that will display either the sum or the product of two bit binary numbers according to the value of a separate Addition/Multiplication switch. The result will be displayed on a seven segment display. Derive the equation for each output in SOP form. Drive the inputs of the decoder with outputs from the Basys 3. LAB 7 A8 x B A oo0 0002 0100 o 1 01 o 01 0 0 1lo OI I IIO0 010 0 LI. 1 01 1 100 O { 100 0000 00 LOD l