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Using Vivado. This was originally made with A : in STD_LOGIC_VECTOR (7 downto 0); B : in STD_LOGIC_VECTOR (7 downto 0); F : out STD_LOGIC_VECTOR

Using Vivado.

This was originally made with

A : in STD_LOGIC_VECTOR (7 downto 0); B : in STD_LOGIC_VECTOR (7 downto 0); F : out STD_LOGIC_VECTOR (7 downto 0));

Need to change x"00" and x"FF" to work with generic integer on:

WHEN "000" => F <=x"00"; WHEN OTHERS => F <=x"FF";

entity ELE218_ALU is GENERIC( N:INTEGER :=8); Port ( sel : in STD_LOGIC_VECTOR (2 downto 0); A : in STD_LOGIC_VECTOR (N-1 downto 0); B : in STD_LOGIC_VECTOR (N-1 downto 0); F : out STD_LOGIC_VECTOR (N-1 downto 0)); end ELE218_ALU;

architecture Behavioral of ELE218_ALU is

begin PROCESS(sel,A,B) BEGIN CASE sel IS WHEN "000" => F <=x"00"; WHEN "001" => F <=B - A; WHEN "010" => F <=A - B; WHEN "011" => F <=A + B; WHEN "100" => F <=A XOR B; WHEN "101" => F <=A OR B; WHEN "110" => F <=A AND B; WHEN OTHERS => F <=x"FF"; END CASE; END PROCESS;

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