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We intend to design using sequence detector DF / F , which generates output y as ' 1 ' when three or more ' 0

We intend to design using sequence detector DF/F, which generates output y as '1' when three or more '0's are in succession from the input x.(That is, if the input x is O or 00, the output y must be 0 and from the time x is 000, the output y must be 1. If the next input is 0, y remains 1, but if the next input is 1, y becomes 0, and returns to the initial state.)
a) Draw a state diagram.
b) Write a state table.
c) Using K-map, simplify each F/Finput and output expression.
d) Draw a sequence detector circuit using the D F/F and logic gate.
Please solve all of 4questions.
When designing and drawing, I would appreciate it if you could write it by hand or use an easy-to-recognize program
Thank you!!

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