What happens to the BCD counter when ENABLE $=0$ while having a running clock?Note: ENABLE goes to all ENA signals on the flip$-$flops. Page $3$ of EEE$\_4\_$DLD$-$Lab$3.$docxQuestion $20$ Select one:The output goes to $0$The flip$-$flops of the counter go metastableThe output increments by $1$The output remains unchanged