Question
When an interrupt occurs, control must be transferred from the currently executing program to a subroutine that handles the activity required to service the interrupt.
When an interrupt occurs, control must be transferred from the currently executing program to a subroutine that handles the activity required to service the interrupt. For each interrupt, a "context switch" is said to occur. In addition to transferring control, a context switch includes the saving and restoration of any required registers. Assume that it takes 1000 clock cycles to perform each context switch when an I/O device triggers an interrupt. The interrupt handler subroutine takes an additional 8,000 cycles to service the device request. Once the device has been serviced, another 1000 cycles are required to perform the context switch needed to return from the interrupt handler back to the program that was running. The processor's clock rate is 2 GHz.
a) (5) What is the maximum number of requests per second that a device can generate if the system must complete every activity associated with each interrupt, including the context switches, before the next interrupt occurs?
b) (5) The registers used in managing exceptions and interrupts on our MIPS processor are described in the sub-module "2.2 Interrupt Driven Input/Output" as well as in section A.7 of the textbook. Write down a short sequence of MIPS true-op assembly language instructions that reads the current exception code and places just the code right justified into CPU register $t0. No CPU registers other than $t0 should be modified or saved by the instruction sequence.
c) (5) Suppose that interrupt driven I/O is used and a device issues 10000 evenly spaced requests per second to transfer 1 byte per request. If each instruction takes one clock cycle, how many instructions, other than those related to I/O, can the CPU perform each second?
d) (5) Suppose that instead of interrupt driven I/O, DMA is used to transfer a 10000-byte data block each second. If each instruction takes one clock cycle, how many instructions, other than those required for I/O, can the CPU perform each second?
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