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While we have concentrated mostly on architectural ways to minimize the delays incurred by pipeline hazards, it may also be possible for the programmer or
While we have concentrated mostly on architectural ways to minimize the delays incurred by pipeline hazards, it may also be possible for the programmer or compiler/assembler to reorder instructions in order to minimize or even eliminate pipeline bubbles, and minimize unproductive cycles (e.g. nop instructions). Consider the following code: lw $ti, 0 ($t2) instruction 1 add $t2, $t1,$t3 instruction 2 add $t3, $t1,$t2 #instruction 3 sub $t6, $t4, $t5 #instruction 4 $t8, 0($t7) instruction 5 $t6, $t7, $t8 instruction 6 $t5, $t7, $t3 instruction 7 beg $t1,$t5, label instruction 8 instruction 9 label: lw or or nop a) Identify the instructions (using their sequence number labels appearing in the comment field) that have data hazards. (6 points) b) Attempt to reorder the instructions in order to reduce the data hazards, while preserving the correct operation of the code. Just provide the permutation of the instruction sequence number labels. (6 points) c) Assuming that branch delay slots are used, can the nop instruction be replaced with a productive instruction? If so, identify that instruction's original sequence number label. (3 points) While we have concentrated mostly on architectural ways to minimize the delays incurred by pipeline hazards, it may also be possible for the programmer or compiler/assembler to reorder instructions in order to minimize or even eliminate pipeline bubbles, and minimize unproductive cycles (e.g. nop instructions). Consider the following code: lw $ti, 0 ($t2) instruction 1 add $t2, $t1,$t3 instruction 2 add $t3, $t1,$t2 #instruction 3 sub $t6, $t4, $t5 #instruction 4 $t8, 0($t7) instruction 5 $t6, $t7, $t8 instruction 6 $t5, $t7, $t3 instruction 7 beg $t1,$t5, label instruction 8 instruction 9 label: lw or or nop a) Identify the instructions (using their sequence number labels appearing in the comment field) that have data hazards. (6 points) b) Attempt to reorder the instructions in order to reduce the data hazards, while preserving the correct operation of the code. Just provide the permutation of the instruction sequence number labels. (6 points) c) Assuming that branch delay slots are used, can the nop instruction be replaced with a productive instruction? If so, identify that instruction's original sequence number label. (3 points)
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