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write behavioral verilog code of 4-bit shift right rotate register. the module will take inputs A, clk, reset and rotate. if reset signal is ON,
write behavioral verilog code of 4-bit shift right rotate register. the module will take inputs A, clk, reset and rotate. if reset signal is ON, the register will be reset to all 0s. if the rotate signal is ON, the rightmost bit will be loaded as the leftmost bit and other bits will be shifted right. All operations should be synchronous with clk.
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