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Write the VHDL code for 8-bit register with asynchronous reset LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY rec8 IS PORT (D: IN STD_LOGIC_VECTOR(7 DOWNTO 0); Reset, Clock:
Write the VHDL code for 8-bit register with asynchronous reset LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY rec8 IS PORT (D: IN STD_LOGIC_VECTOR(7 DOWNTO 0); Reset, Clock: IN STD_LOGIC; Q: OUT STD_LOGIC_VECTOR(7 DOWNTO 0)); END reg8
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