Write VHDL code for the FSM given

The machine has to generate z = 1 when the previous four values of w were 1001 or 1111; otherwise, z = 0. Overlapping input patterns are allowed. An example of the desired behavior is w : 010111100110011111 z : 000000100100010011

The state diagram for the FSM is given by the figure shown below. Some pointers for reading the diagram below 1. The circles with darkened boundaries represent the states of the FSM. For example, the darkened circle with the number 111 written within it represents the state where the sequence 111 has been detected. The directed arrow 1/1 (input/output) going from state 111 to state 1111 indicates that when the input, w-1, then the sequence 1111 has been detected and the output, z-1 2. The directed arrows from one state to another are of the form (input(w)/output(z)) i.e. when the system is in a particular state, the input(w) causes the system to go to the next state pointed to by the arrow, and the output becomes (z) lo I/A The state diagram for the FSM is given by the figure shown below. Some pointers for reading the diagram below 1. The circles with darkened boundaries represent the states of the FSM. For example, the darkened circle with the number 111 written within it represents the state where the sequence 111 has been detected. The directed arrow 1/1 (input/output) going from state 111 to state 1111 indicates that when the input, w-1, then the sequence 1111 has been detected and the output, z-1 2. The directed arrows from one state to another are of the form (input(w)/output(z)) i.e. when the system is in a particular state, the input(w) causes the system to go to the next state pointed to by the arrow, and the output becomes (z) lo I/A