You don$$t need to consider the latencies of other components that are not listed in the above table. Note that some operations can be performed at the same time. For example, PC$+4$ and instruction memory access can be done in parallel so only instruction memory latency will be counted.

$($a$)$ What is the latency of an R$-$type instruction $($i$.$e$.,$ how long must the clock period be to ensure that this instruction works correctly$)?$

$($b$)$ What is the latency of LDUR? $($Check your answer carefully. Many students place extra muxes on the critical path.$)$

$($c$)$ What is the latency of STUR? $($Check your answer carefully. Many students place extra muxes on the critical path.$)$

$($d$)$ What is the latency of B$?$

$($e$)$What is the minimum clock period for this CPU?