You have a cache that holds $4$ blocks, each block is $4$ Words. Initially the cache is empty $($e$.$g$.$ all blocks are invalid$).$ The Main Memory is shown in the table below and is byte addressable.

For the loop given in the assembly code below, what is the final data in the cache assuming $($a$)$ direct mapped $($b$)2-$way set associative and $($c$)$ fully associative? Empty tables for each type of

cache are below. Write a description of how each cache works $($hits and misses$)$ and how you reached your end result.

LOOP: lw $\backslash$$s$0,0(\backslash$$s$3)$

addi $\backslash$$s$1,\backslash$$s$3,64$

$\backslash$# $\backslash$$s$0=$ Array$[$i$]$

add $\backslash$$s$2,\backslash$$s$2,\backslash$$s$0$

sw $\backslash$$s$2,0(\backslash$$s$1)$

$\backslash$# $\backslash$$s$1=\backslash$$s$3+64$

$\backslash$# $\backslash$$s$2=\backslash$$s$2+\backslash$$s$0$

addi $\backslash$$s$3,\backslash$$s$3,4$

$\backslash$# Array$[$i$+16]=\backslash$$s$2$

bne $\backslash$$s$2,\backslash$$s$4,$ L$00$P

$\backslash$# $\backslash$$s$3=\backslash$$s$3+4$

$\backslash$# branch if $(\backslash$$s$2!=\backslash$$s$4)$

Initial values of the registers:

$\backslash [$

$\backslash$begin$\{$array$\}\{$l$\}$

$\backslash$$ s $2=0\backslash \backslash$

$\backslash$$ s $3=0\backslash$times $0000\backslash \backslash$

$\backslash$$ s $4=120$

$\backslash$end$\{$array$\}$

$\backslash ]$