You must use the provided logging functions (described here and in the code) to document where you are getting your PPN (TLB, Page Table, or Page Fault Handler) and what the physical address is. TLB: You will be implementing a TLB to cache memory addresses. Implement it as a direct- mapped cache, which will initially be empty (i.e. all entries have valid set to 0), but you will update and use this data structure based on the memory addresses provided. For the TLB you will use the first 5 bits of the VPN as the tag and the remaining 4 bits for the index. The data the TLB will hold are the most recently used PPNs (11-bits) Virtual Address VPN VPO Tag Index Page Table: You will be implementing a simple page table that is indexed by the VPN and consists of a valid bit and the PPN entry for the VPN index. If the data is not in the TLB, you will search the page table for the value. If you find the value in the page table, make sure to update your TLB with the information! If you do not find the value in the page table, then you will need to call the library function, load frame(vpn), which will load the frame from memory and return the PPN where it is loaded. You will then update the page table AND the TLB with the information so the next time you search for it, it will be in both places. For this project, once you have loaded a frame, it will stay in memory. You will not have to remove anything from your page table. Once you have computed the physical address, you will use this address to get your data. To do this, you will first check the memory cache for the data. If it is not there, you will need to get it directly from main memory. Just as computing the address, you must use the logging functions to document where your data came from (Cache or Memory) Cache - The first 13 bits of the physical address will be used for the tag. The next 5 bits will be for the index and the last 2 bits is the offset. Your cache will hold 4 bytes of data; use the last two bits of the physical address to get the correct byte to return. Physical Address PPN PPO Tag IndexByte Offset Just like the TLB, this cache should initially have everything marked as invalid. The data will be stored little endian, meaning if the data in the cache is 0x12345678 and the offset bits 1, you will be returning 0x56. This will be a two-way set associative cache, meaning each set has two possible entries. The added issue here is that when you put something into the cache, you have two possible location choices. So that we are all doing the same thing, our replacement algorithm is: o o o If both entries are invalid, use the first one If one entry is valid and one is invalid, use the invalid one If both entries are valid, use the oldest one Oldest entry: To figure out which entry is the oldest one, you should use a timestamp like approach, where you always replace the entry with the lowest timestamp. Main Memory: The supporting library implements main memory via a function get_word(addr) which returns a 4-byte integer at address (addr &"Ox3). For example, if you request the byte at address Ox101, you will get the 4 bytes starting at 0x100 (0x100, Ox101, 0x102, and 0x103). Be sure to update the cache if you have to get data from memory You must use the provided logging functions (described here and in the code) to document where you are getting your PPN (TLB, Page Table, or Page Fault Handler) and what the physical address is. TLB: You will be implementing a TLB to cache memory addresses. Implement it as a direct- mapped cache, which will initially be empty (i.e. all entries have valid set to 0), but you will update and use this data structure based on the memory addresses provided. For the TLB you will use the first 5 bits of the VPN as the tag and the remaining 4 bits for the index. The data the TLB will hold are the most recently used PPNs (11-bits) Virtual Address VPN VPO Tag Index Page Table: You will be implementing a simple page table that is indexed by the VPN and consists of a valid bit and the PPN entry for the VPN index. If the data is not in the TLB, you will search the page table for the value. If you find the value in the page table, make sure to update your TLB with the information! If you do not find the value in the page table, then you will need to call the library function, load frame(vpn), which will load the frame from memory and return the PPN where it is loaded. You will then update the page table AND the TLB with the information so the next time you search for it, it will be in both places. For this project, once you have loaded a frame, it will stay in memory. You will not have to remove anything from your page table. Once you have computed the physical address, you will use this address to get your data. To do this, you will first check the memory cache for the data. If it is not there, you will need to get it directly from main memory. Just as computing the address, you must use the logging functions to document where your data came from (Cache or Memory) Cache - The first 13 bits of the physical address will be used for the tag. The next 5 bits will be for the index and the last 2 bits is the offset. Your cache will hold 4 bytes of data; use the last two bits of the physical address to get the correct byte to return. Physical Address PPN PPO Tag IndexByte Offset Just like the TLB, this cache should initially have everything marked as invalid. The data will be stored little endian, meaning if the data in the cache is 0x12345678 and the offset bits 1, you will be returning 0x56. This will be a two-way set associative cache, meaning each set has two possible entries. The added issue here is that when you put something into the cache, you have two possible location choices. So that we are all doing the same thing, our replacement algorithm is: o o o If both entries are invalid, use the first one If one entry is valid and one is invalid, use the invalid one If both entries are valid, use the oldest one Oldest entry: To figure out which entry is the oldest one, you should use a timestamp like approach, where you always replace the entry with the lowest timestamp. Main Memory: The supporting library implements main memory via a function get_word(addr) which returns a 4-byte integer at address (addr &"Ox3). For example, if you request the byte at address Ox101, you will get the 4 bytes starting at 0x100 (0x100, Ox101, 0x102, and 0x103). Be sure to update the cache if you have to get data from memory