You will build a seven-segment display decoder, shown in Figure 3. The circuit has four input bits, D3:0 (representing a hexadecimal number between 0 and F), and produces seven output bits, Sa:g, that drive the seven segments to display the number. The 7-segment display we will use in this lab is a common cathode type, a segment of the display turns on when it is 1. The other type of 7-segment display is common anode, for which a segment turns on when it is 0. To design your seven-segment display decoder, you will first write the truth table specifying the output values for each input combination. We have started the truth table for you in Table 1. For example, when the input is D3:0 = 0000, all of the segments except g should be on. so Sg:a = 0111111. Complete the truth table for the 7-segment display decoder circuit. You will need to turn in your completed truth table. After completing the truth table, write equations for each output segment. You should have seven separate equations for Sa through Sg. You may find that in the truth table there are much more 1s than 0s, so you may want to use Maxterms when you write down certain logical equations. Or, alternatively, you can try to complete truth table and write down equation for Sa through Sg, then add a not gate for each to get Sa through Sg. Next, translate your equations to logic gates and sketch your design. You may use logic gates with any number of inputs. You may choose to optimize for design time or number of gates. Describe your design choice in one paragraph.