You would like to build a synchronizer that can receive asynchronous inputs with an MTBF of 50 years. Your system is running at 1 GHz, and you use sampling flip-flops with = 100 ps, T0 = 110 ps, and tsetup = 70 ps. The synchronizer receives a new asynchronous input on average 0.5 times per second (i.e., once every 2 seconds).

(a) What is the required probability of failure per second to satisfy this MTBF?

(b) How many clock cycles would you have to wait before reading the sampled input signal to give that probability of error?