Question
Your ALU can add its two input registers, and it can logically complement the bits of either input register, but it cannot subtract. Numbers are
Your ALU can add its two input registers, and it can logically complement the bits of either input register, but it cannot subtract. Numbers are to be stored in twos complement representation.
Based on the bus structure given below, assumed that the minuend is stored in Y and the subtrahend needs to be fetched from memory and loaded into MBR. The steps are as follows:
i. Load the memory address of the subtrahend ii. PC points to the next instruction iii. Load the subtrahend from memory iv. Load the subtrahend into accumulator for twos complement v. Perform twos complement on the subtrahend, store the results in the accumulator. vi. Add subtrahend and minuend, store the results in register Z.
List the micro-operations your control unit must perform to cause a subtraction.
Cai tr IN PCS Address tines MAR Data lines MER Internal CPUs ALU StarStep by Step Solution
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