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Your company, Detect - o - rama, would like to design an FSM that takes two inputs, A and B , and generates one output,

Your company, Detect-o-rama, would like to design an FSM that
takes two inputs, A and B, and generates one output, Z. The output in cycle n, Zn,
is either the Boolean AND or OR of the corresponding input An and the previous
input An-1, depending on the other input, Bn:

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