Failure times of silicon wafer microchips. Refer to the National Semiconductor study of manufactured silicon wafer integrated circuit chips, Exercise 12.63 (p. 753). Recall that the failure times of the microchips (in hours) was determined at different solder temperatures (degrees Celsius). The data are repeated in the table below. Temperature (°C) Time to Failure (hours) Temperature (°C) Time to Failure (hours) 165 200 149 1,150 162 200 142 3,500 164 1,200 142 3,600 158 500 143 3,650 158 600 133 4,200 159 750 132 4,800 156 1,200 132 5,000 157 1,500 134 5,200 152 500 134 5,400 147 500 125 8,300 149 1,100 123 9,700 Source: S. Gee and L. Nguyen, “Mean Time to Failure in Wafer Level-CSP Packages with SnPb and SnAgCu Solder Bumps,” International Wafer Level Packaging Conference, San Jose, CA, November 3–4, 2005 (adapted from Figure 7). Copyright: 2005.

a. Fit the straight-line model E1y2 = b0 + b1x to the data, where y = failure time and x = solder temperature

b. Compute the residual for a microchip manufactured at a temperature of 149°C.

c. Plot the residuals against solder temperature 1x2. Do you detect a trend?

d. In Exercise 12.63c, you determined that failure time 1y2 and solder temperature 1x2 were curvilinearly related. Does the residual plot, part

c, support this conclusion?