Consider the circuit in Figure 8.34. The supply voltages are \(V^{+}=10 \mathrm{~V}\) and \(V^{-}=-10 \mathrm{~V}\), and the \(R_{3}\) and \(R_{4}\) resistor values are zero. The transistor parameters are: \(\beta_{1}=\beta_{2}=120, \beta_{3}=\beta_{4}=50, I_{S 1}=I_{S 2}=2 \times 10^{-13} \mathrm{~A}\), and \(I_{S 3}=I_{S 4}=2 \times 10^{-12} \mathrm{~A}\).

(a) The range in output current is \(-1 \leq\) \(i_{O} \leq+1 \mathrm{~A}\). Determine the values of \(R_{1}\) and \(R_{2}\) such that the currents in \(Q_{1}\) and \(Q_{2}\) do not vary by more than \(2: 1\).

(b) Using the results of part (a), determine the quiescent collector currents in the four transistors for \(v_{I}=\) \(v_{O}=0\).

(c) Calculate the output resistance, excluding \(R_{L}\), for a quiescent output voltage of zero. Assume the source resistance of \(v_{I}\) is zero.

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iB1 www R JiEI 23 R3 iB2 R4 Q2 iE2 Q4 ww R 150 ww RL Figure 8.34 Class-AB output stage with input buffer transistors