For each transistor in the circuit in Figure P3.44, (k_{n}^{prime}=120 mu mathrm{A} / mathrm{V}^{2}). Also for (M_{1},

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For each transistor in the circuit in Figure P3.44, \(k_{n}^{\prime}=120 \mu \mathrm{A} / \mathrm{V}^{2}\). Also for \(M_{1}, W / L=4\) and \(V_{T N}=0.4 \mathrm{~V}\), and for \(M_{2}, W / L=1\) and \(V_{T N}=-0.6 \mathrm{~V}\).

(a) Determine the input voltage such that both \(M_{1}\) and \(M_{2}\) are biased in the saturation region.

(b) Determine the region of operation of each transistor and the output voltage \(v_{O}\) for: (i) \(v_{I}=0.6 \mathrm{~V}\) and (ii) \(v_{I}=1.5 \mathrm{~V}\).

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