The bias voltage in the circuit shown in Figure 5.63 is changed to \(V^{+}=5 \mathrm{~V}\). Design the circuit to meet the following specifications: \(V_{C E 1}=V_{C E 2}=1.2 \mathrm{~V}, \quad V_{R E}=0.5 \mathrm{~V}, \quad I_{C 1} \cong I_{C 2} \cong 0.2\mathrm{~mA}, \quad\) and \(I_{R 1} \cong I_{R 2} \cong I_{R 3} \cong 20 \mu \mathrm{A}\).

Figure 5.63:-

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Vi V+=+9 V Rc CB CCI R 22 CC2 +1 + R3 RE VRE RL Figure 5.63 A bipolar cascode circuit for Example 5.20