The bias voltages for the diff-amp shown in Figure 11.30 are (V^{+}=5 mathrm{~V}) and (V^{-}=-5 mathrm{~V}). A
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The bias voltages for the diff-amp shown in Figure 11.30 are \(V^{+}=5 \mathrm{~V}\) and \(V^{-}=-5 \mathrm{~V}\). A load resistance of \(R_{L}=250 \mathrm{k} \Omega\) is capacitively coupled to the output. The transistor parameters are \(\beta=120\), \(V_{A 1}=V_{A 2}=90 \mathrm{~V}\), and \(V_{A 3}=V_{A 4}=60 \mathrm{~V}\).
(a) Determine the bias current \(I_{Q}\) that will produce a differential-mode voltage gain of \(A_{d}=1000\).
(b) If \(V_{E B}(\mathrm{on})=0.6 \mathrm{~V}\), what is the maximum common-mode voltage that can be applied such that all transistors are biased in the forward-active mode?
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Related Book For
Microelectronics Circuit Analysis And Design
ISBN: 9780071289474
4th Edition
Authors: Donald A. Neamen
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