The bias voltages for the diff-amp shown in Figure P11.10 are \(V^{+}=3 \mathrm{~V}\) and \(V^{-}=-3 \mathrm{~V}\). The transistor current gains are \(\beta=80\), the nominal value of \(V_{B E}\left(\right.\) on) is \(0.6 \mathrm{~V}\), and \(V_{A}=\infty\).

(a) Design the circuit such that the quiescent collector currents are \(50 \mu \mathrm{A}\) and \(v_{C 1}=v_{C 2}=-1.5 \mathrm{~V}\) for \(v_{1}=v_{2}=0\).

(b) Determine \(v_{C 1}\) and \(v_{C 2}\) when (i) \(v_{1}=v_{2}=1 \mathrm{~V}\) and (ii) \(v_{1}=0.994 \mathrm{~V}, v_{2}=1.006 \mathrm{~V}\).

Transcribed Image Text:

V+ RE "CI C2 RC RC Figure P11.10 22