The NMOS transistors in the circuit shown in Figure P16.68 have parameters (K_{n}=0.2 mathrm{~mA} / mathrm{V}^{2}, V_{T

Question:

The NMOS transistors in the circuit shown in Figure P16.68 have parameters $K_{n}=0.2 \mathrm{~mA} / \mathrm{V}^{2}, V_{T N}=0.5 \mathrm{~V}, \lambda=0$, and $\gamma=0$.

(a) For gate voltages of $\phi=2.5 \mathrm{~V}$, determine the quasi-steady-state output voltage for (i) $v_{I}=0$, (ii) $v_{I}=2.5 \mathrm{~V}$, and (iii) $v_{I}=1.8 \mathrm{~V}$.

(b) Repeat part (a) for gate voltages of $\phi=2.0 \mathrm{~V}$.

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