The program execution of Figure is described in the text using six steps. Expand this description to show the use of the MAR and MBR.

Fetch stage Execute stage CPU registers Memory CPU registers emo 3001 9 4 0 301 5 9 4 0 3 0 0 PC 300 1 9 4 0 AC 3015 9 4 1 3 0 1 PC 0 0 0 3 AC 940 10 0 0 3 941 0 0 0 2 Step 1 940 10 0 0 3 941 0 0 0 2 Step 2 emo CPU registers Memory CPU registers 300 1 9 4 0 301 5 9 4 1 302 3 0 IPC 3001 9 4 0 () 0 0 3|AC| 301 | 5 9 4 1 5941 IR 302 2 9 4 I 2 3 0 2 PC 0 0 0 5 AC 59411R 940 0 0 0 3 941 0 0 0 2 940 0 0 0 3 94110 0 0 2 Step 4 Memory 300 1 9 4 0 301 5 9 4 1 302 2 9 4 1 CPU registers CPU registers 3 0 3 PC Memory 3 0 2 PC 300 1 9 4 0 0 0 0 5 AC301 5 9 4 1 294 IR 302 29 4 1 3 940 0 0 0 3 940 0 0 0 3 941 0 0 0 2 5 941 0 0 0