Design a MOS Widlar current source using the circuit shown in Fig. 4.31b to meet the following

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Design a MOS Widlar current source using the circuit shown in Fig. 4.31b to meet the following constraints with VDD= 3 V:

(a) The input current should be 100 µA, and the output current should be 10 µA.

(b) Vov1 = 0.2 V.

(c) Transistor M2 must operate in the active region if the voltage from the drain of M2 to ground is at least 0.2 V.

(d) The output resistance should be 50 MΩ.

Ignore the body effect. Assume Ldrwn = 1 µm and Xd = Ld = 0. Use Table 2.4 for other parameters.

Fig. 4.31 (b):

VDD IN IOUT ER, M2 M1 R2 (b)

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Analysis and Design of Analog Integrated Circuits

ISBN: 978-0470245996

5th edition

Authors: Paul R. Gray, ‎ Paul J. Hurst Stephen H. Lewis, ‎ Robert G. Meyer

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