Consider a fully associative 16-byte cache with four lines of four words. The cache uses a LRU

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Consider a fully associative 16-byte cache with four lines of four words. The cache uses a LRU (least recently used) algorithm to deal with line replacement. When the cache is initially empty, lines are added from line 0 onward.

Given the following sequence of hexadecimal addresses, indicate whether a hit or miss takes place. Show the state of the cache at the end of the reads. 

00 03 05 08 13 14 11 04 OF OC 23 00 01 02 04 06 05 07 09 21

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