Consider the following code that accesses three values in memory scalar integers x and s, and an
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Consider the following code that accesses three values in memory scalar integers x and s, and an integer vector y[i]. What is the memory latency in clock cycles for a trip round the loop ( after the first iteration)? Assume that the array is not cached and each new access to the array results in a miss.
The system has both Ll and L2 caches. The access time of the Ll cache is two cycles, the access time of the L2 cache is 6 cycles and main memory has an access time of 50 cycles. In this case all memory and cache memory accesses take place in parallel.
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Computer Organization And Architecture Themes And Variations
ISBN: 9781111987046
1st Edition
Authors: Alan Clements
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