List at least one more possible pair of values for C and D if such assumptions are not maintained.

Memory consistency concerns the views of multiple data items. The following table shows two processors and their read/write operations on different cache blocks (A and B initially 0).

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a. b. A A = 1; B 1; B = 2; A+=2; B++; 2; A=5; B++; P1 = C C P2 B; D = A; B; D = A;