Looking at the memory operations for the different instructions shown in Figures 4.18 to 4.21, we can see that the data for memory writes are always either valA or valP. Write HCL code for the signal mem_data in SEQ.

Figures 4.18

Figures 4.21

Transcribed Image Text:

Stage Fetch Decode Execute Memory Write back PC update OPq rA, rB icode: ifun rA:B ← M₁ [PC] M₁ [PC + 1] valp - PC+2 valA - R[rA] valB ← R[TB] valEvalB OP valA Set CC R[rB] ←valE PC - valp rrmovq rA, rB icode:ifun M₁[PC] rA:rB M₁[PC + 1] valp PC+2 valA - R[rA] valE - R[RB] 0 + valA ← valE PC ← valP irmovq V, rB icode: ifun - M₁[PC] rA:rB ← M₁[PC + 1] valc ← valp Mg[PC + 2] ← PC + 10 valE + 0 + valC R[TB] ← valE PC- valP