The register signal srcB indicates which register should be read to generate the signal valB. The desired

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The register signal srcB indicates which register should be read to generate the signal valB. The desired value is shown as the second step in the decode stage in Figures 4.18 to 4.21. Write HCL code for srcB.

Figures 4.18

Stage Fetch Decode Execute Memory Write back PC update OPq rA, rB icode: ifun rA:B  M [PC] M [PC + 1] valp

Figures 4.21

Stage Fetch Decode Execute Memory Write back PC update jXX Dest icode: ifun - M[PC] valC+ Mg[PC + 1] valp

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Computer Systems A Programmers Perspective

ISBN: 9781292101767

3rd Global Edition

Authors: Randal E. Bryant, David R. O'Hallaron

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