In the dc-dc converter of Problem 67, Chapter 4 (Van Dijk, 1995), with L = 6 mH, C = 1 mF, R = 100 Ω, a 50% PWM duty cycle, and assuming the system’s output is the voltage across the capacitor, the model can be expressed as

                           

a. Find the system’s transfer function.

b. Express the system’s state equations in phase variable form.

c. Find a set of state-feedback gains to obtain 20% overshoot and a settling time of 0.5 second in the phase-variable system.

d. Obtain the corresponding set of state-feedback gains in the original system.

e. Verify that the set of gains in Part d places the closed-loop poles at the desired positions.

f. Simulate the unit step response of the system using MATLAB.

iL + 166.67 E, -83.33 500 -10 uc y = [0 uc