In the system of Figure 10-33, A, B, and C are BILBO registers. The B 1 and
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B1B2= 00, shift register; B1B2= 01, PRPG (pattern generator); B1B2= 10, normal system mode; B1B2= 11, MISR (signature register). The shifting into A, B, and C is always LSB first. When in the test mode, the Dbus is not used. Specify the sequence of the tester outputs (B1, B2, and Si) needed to perform the following operations:
1. Load A with 1011 and B with 1110; clear C.
2. Test the system by using A and B as pattern generators and C as a signature register for four clock times.
3. Shift the C register output into the tester.
4. Return to the normal system mode.
B1 B2 Si = 0 0 0,
Figure 10-33: System with BILBO Registers and Tester
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Related Book For
Digital Systems Design Using Verilog
ISBN: 978-1285051079
1st edition
Authors: Charles Roth, Lizy K. John, Byeong Kil Lee
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