Instead of using dual-port flip-flops of the type shown in Figure 10-8, scan testing can be accomplished
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Instead of using dual-port flip-flops of the type shown in Figure 10-8, scan testing can be accomplished using standard D flip-lops with a MUX on each D input to select D1 or D2. Redraw the circuit of Figure 1-22 to establish a scan chain using D flip-flops and MUXes. A test signal (T) should control the MUXes.
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Related Book For
Digital Systems Design Using Verilog
ISBN: 978-1285051079
1st edition
Authors: Charles Roth, Lizy K. John, Byeong Kil Lee
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