Repeat Problem 7-9 for the counter of Figure 7-8(a) with a 70-kHz clock. Figure 7-8(a) Data from

Question:

Repeat Problem 7-9 for the counter of Figure 7-8(a) with a 70-kHz clock.


Figure 7-8(a)

D D CLK CLR O J 30 kHz K   J CLK O K CLR (a)  m B D B J CLKO K CLR A J CLK O CLR K


Data from Problem 7-9

The decade counter in Figure 7-8(b) has a 1-kHz clock applied.

(a) Draw the waveforms for each FF output, showing any glitches that may occur.

(b) Determine the frequency of the signal at the D output.

(c) If the counter is originally at state 1000, what state will the counter be at after 14 clock pulses are applied?

(d) If the counter is originally at state 0101, what state will the counter be at after 20 clock pulses are applied?


Figure 7-8(b)

D D CLK < CLR  1 MHz  10 CLK O K CLA D B B CLK O CLR A  14 CLK O CLR

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Related Book For  book-img-for-question

Digital Systems Principles And Application

ISBN: 9780134220130

12th Edition

Authors: Ronald Tocci, Neal Widmer, Gregory Moss

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