The synchronous data transmission system of Figures 9-32 and 9-33 is not working properly and the troubleshooting tree diagram of Figure 9-38 has been used to isolate the problem to the timing and control section of the receiver. Draw a troubleshooting tree diagram that will isolate the problem further to one of the four blocks in that section (FF1, Bit counter, Word counter, or FF2). Assume that all wires are connected as shown, with no wiring errors

Figure 9-32

Figure 9-33

Figure 9-38

Transcribed Image Text:

Id A Id_B Id_C Id_D Clock Transmit PISO registers A₂A₂A₁A Bạ Ba|Bị| Bo C₂ C₂ C₁ C₂ D₂ D₂ D₂ D₂ Shift_enable FF2 J CLK 4 K 1 1,Four-input multiplexer Z 12 MUX S₁ TC So Qo CLK MOD-4 EN counter CLRO Word counter /sent transmit data Q₁QCLK TC MOD-4 EN counter CLR Bit counter FF1 D CLK CLR