(a) Connect the outputs of three 3 -state buffers together, and add additional logic to implement the function

\[F=\bar{A} B C+A B D+A \bar{B} \bar{D}\]

Assume that \(C, D\), and \(\bar{D}\) are data inputs to the buffers and \(A\) and \(B\) pass through logic that generates the enable inputs.

(b) Is your design in part (a) free of three-state output conflicts? If not, change the design to be free of such conflicts.