1. Convert the truth table to the standard SOP expression.Simply it by Karnaugh map;Drew the digital circuits. 2. Use a Karnaugh map to minimize the following standard SOP expression F (ABCD) = m (2,3,5,7,8,10,12,13) 3. Simply following logic function by Karnaugh map. {FLA.B.C.D)=E(4.5.6.13.14.15) Truth Table INPUTS ABCD 0 0 0 0 00 0 1 00 1 0 0011 0100 01 0 1 01 1 0 1 0 11 0 0 0 0 1 0 1 1:0 1 0 0 1 1 1 1 0 0 1 11 1 1 0 1 1 0 1 1 4. 4.3-bit Excess-4 Logic Design Excess-4 Logic is a very simple circuit that creating a result of A+4 when A is input to the circuit For example, when 2 is input, 6 will be output. When 5 is input,9 will be output. For a 3-bit Excess-4 Logic we are going to have 4-bit output. (1)Based on the description above, construct the Truth Table ofa 3-bit Excess-4 Logic Circuit. TOUTPUT F O 0 0 0 0 0 0 0 0 0 0 1 1 1 1 A 0 0 0 0 1 I I I Input A 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 By 0 B 1 Output B 0 B 0 (2) Without using minimization, write down the Boolean expression of the four output bits B3,B2,B1,B0. (3)Simplify the logic by using K-map. Write down the simplified expressions of B3,B2,B1,B0.