01 [20 pts) 4- Based on the initial register and data memory contents shown below (represented in hexadecimal), show how these contents are modified (in hexadecimal), including N, Z, and C bits of the Status register (SR), after executing each of the following AVR assembly instructions. Instructions are unrelated. (i) MOV R1, R28 (ii) LD R4, Y+ Registers Data Memory (iii) LDI R4, 33 RO 01 0100 (iv) MUL R2, R3 05 0101 BE (V) ROL R3 R2 1B 35 0103 EC 07 0104 48 01 0105 2D 0106 0106 Y 0102 0107 02 SREG FF R1 0102 R3 ||||||| R4 04