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1 0 - Consider achieving the best performance for the following instructions: 1 Add R 4 , R 2 , R 3 2 . SW

10-Consider achieving the best performance for the following instructions:
1 Add R4, R2, R3
2. SW R5, #100(R4)
3. LW R6, #200(R4)
4. Sub R7, R5, R6
Assume each stage takes one cycle, the pipeline finishes at:
Select one:
a. cycle 9
b. cycle 12
c. cycle 10
d. cycle 8
e. cycle 11
11-The instructions
Add R1,R2,R3
Sub R2,R7,R3
And R5,R1,R6
cause data hazards that are:
Select one:
a. WAR and RAW
b. WAR and WAR
c. RAW and WAR and RAW
d. RAW and RAW
e. WAW and WAW
12-Consider achieving the best performance for the following instructions:
1 Add R4, R2, R3
2. SW R5, #100(R4)
3. LW R6, #200(R4)
4. Sub R7, R5, R6
the data hazard between 2 and 4 are solved by:
Select one:
a. forwarding from Ex in 2 to mem in 4
b. forwarding from Mem in 2 to mem in 4
c. no data hazards
d. forwarding from Ex in 2 to Ex in 4
e. stall
13-If the system executes one task at a time, the throughput =1/latency
Select one:
True
False
14-RISC can support smaller number of registers than CISC
Select one:
True
False
15-the number of addresses in VAX machines computer architecture is fixed
Select one:
True
False

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