1. The circuit you are to design will output a 1 when 1 of the 4 inputs is not the same as the others. In other words, 3 of the inputs are the same. Note this does not say if the inputs are a 1 or a 0, just that they are the same. 2. You may use a K-map or algebraic manipulation to achieve the optimal circuit. 3. Create a design for this circuit. You may use 4 input NAND (7420) gates for this circuit as well as 2 input NAND gates ONLY, NO OTHER GATES ARE ALLOWED, .e. 7404. To accomplish this, I suggest drawing the circuit out on paper according to the result you got from your K-map and then do the distribution of bubbles to get the NAND equivalent circuit. Something to consider - NAND gates are not cascade-able (extendable in the same way as AND and OR from the last lab) so the extension to multiple inputs you used for the AND and the OR WILL NOT word for the NAND. 4. Simulate your design. This means you will have to build a stimulus file in order to test the circuit