1) We can notice that in the sample datapath, we have high- lighted a couple of digital devices that can be combined, in order to reduce our space requirements. The two adders and the two 8-bit counters can be com- bined using MUXes in order to optimize our design. Your task is to optimize the datapath shown in the figure below, by grouping the highlighted components together and refining the circuit. Please show all new control and status signals, as well as any new devices that your design utilizes to optimize the datapath.

2) Using the datapath designed in (1), show the new detailed ASM chart that will adequately control the newly optimized datapath. Also, show the complete control logic, derived from the new detailed ASM chart, including all state flip- flops, next-state logic and control signal generation logic. State any assumptions and show the legend of your circuit.

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