2. (55 points) Assume that AND, OR and NOT gates are implemented as CMOS circuits. Assume AND gate and OR gate of any number of inputs are available. Assume 2-input XOR gate is implemented using 8 transistors. (The design can be found in Fig. B.55 (page 788) of textbook but it is not important here.) a) (10 points) How many transistors are required to implement the half-adder as shown in Figure 3.1(c) (page 125)? b) (10 points) How many transistors are required to implement the full-adder as shown in Figure 3.4(b) (page 129)? c) (25 points) Consider another implementation of a full-adder. Suppose the functions c and s are simplified in SOP form using K-map. Then the two simplified SOP expressions are implemented separately using AND, OR and NOT gates. Please draw the circuits g the two expressions. How many transistors are required? d) (10 points) How many transistors are required to implement a 32-bit ripple-carry adder as shown in Figure 3.5 (page 130) if full-adders are implemented as in part (b)