2. A full adder can be implemented in many different ways. Figure 1 shows one implementation using two half adders. Construct a truth table for this arrangement and verify that it does operate as a full adder. S1 S2 Half Adder Half Adder - SUM Carry Out For this circuit B Cin si ci S2 C2 SUM Carry Out 0 0 0 001 01 0 0 1 1 1 0 0 For a full adder ABCin SUM Carry Out | 0 0 0 0 0 | 0 0 1 1 0 1 0 1 0 1 0 0|1 1 0 1 | 1 0 0 1 0 |1|0 1 0 1 11001 |1i1 | 1 1 1 | 110 11 1