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2) Consider the following MIPS assembly code: sw $s1, 48(%s0) add $t1, $t2, $t3 beq $s4, $s5 Loop sub $t4, $s2, $t5 sll $t1, 4
2) Consider the following MIPS assembly code:
sw $s1, 48(%s0)
add $t1, $t2, $t3
beq $s4, $s5
Loop sub $t4, $s2, $t5 sll $t1, 4
What will be the performance of executing the above 5 instructions in a single-cycle implementation if:
Accessing (using) Memory Units takes: 250 ps
Register File takes: 200 ps
Main ALU takes: 200 ps
Note: accessing the other unit is considered to take no time.
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