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2. Design a 5 bits register that will be able to perform the following commands. () (3) S1 S2 Register Operation 0 0 Shift Left

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2. Design a 5 bits register that will be able to perform the following commands. () (3) S1 S2 Register Operation 0 0 Shift Left 0 1 Upload 11011 1 0 Shift Right 1 1 Complement all the outputs Here 51 and 52 are two control bits

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