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2. Design a datapath for the following six instructions: add R1, R2, R3 sub R1, R2, R3 sw R1, R2, 7-bits-data lw R1, R2, 7-bits-data
2. Design a datapath for the following six instructions: add R1, R2, R3 sub R1, R2, R3 sw R1, R2, 7-bits-data lw R1, R2, 7-bits-data bne R1, R2, 7-bits-data beq R1, R2, 7-bits-data # RI-R2+R3 #Al-R2-R3 # MM2+ 7-bits-data)-RI # RI-M(R2+ 7-bits-data) # if RI-R2 then jump to PC+2+data # if RI-R2 then Jump to PC+2+data Assume each instruction has 16 bits. Also assume that there are 8 registers, an instruction memory unit with 1K bytes, and a data memory unit with 1K bytes. The 7-bits-data is in 2's complement format
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