21-DPU 21-DPU 21-DPU Since memory is organized as a hierarchy that duplicates information, multiple copies of data exist (in fact, if some DRAM data is in the L1 cache, it is also in all the caches in between). In the event the CPU writes at some address that is in a given cache (hit): A. The data is overwritten in the cache, and when the line is flushed, it is written back to memory. B. The data is immediately written to the main memory. C. A mix of A and B, depending on policy. D. None of these options: caches are read-only. to/21-DPU 121-DPU SysI-W21-DPU -W21-DPU SysII-W211-DPU Answer A. Answer B. Answer C. Answer D