3. (10pts) We know that the offset in LDUR/STUR instruction must be a constant. Assume that you want to add a new instruction called LDURR that can have a register offset, for example, LDURR XO, [X1, X2], in which the address is calculated as the sum of X1 and X2. (a) Are there any additional logic blocks needed to add this new instruction to the LEGv8 datapath shown in the following figure? If yes, add the necessary logic blocks to it and explain their purpose. (b) Show the dataflow for this new instruction using dash lines on the figure below. 2 PCSrc > Add u ALUI 4- Addresult RegWrite Shift left 2) Read PC MemWrite address ALUS Zero Instruction (9-5) Read Instruction [20-1610 register 1 Read M Read data 1 register 2 Write Read Instruction (4-0) register data 2 Reg2Loc. Write data Registers MemtoReg Read Instruction (31-0) Instruction memory ALU ALU Address data result x=33 u Data (c) Hc Write memory data Instruction (31-0) 32 64 Sign- extend 1 ALU control MemRead Reg Instruction (31-21] ALUOP 3. (10pts) We know that the offset in LDUR/STUR instruction must be a constant. Assume that you want to add a new instruction called LDURR that can have a register offset, for example, LDURR XO, [X1, X2], in which the address is calculated as the sum of X1 and X2. (a) Are there any additional logic blocks needed to add this new instruction to the LEGv8 datapath shown in the following figure? If yes, add the necessary logic blocks to it and explain their purpose. (b) Show the dataflow for this new instruction using dash lines on the figure below. 2 PCSrc > Add u ALUI 4- Addresult RegWrite Shift left 2) Read PC MemWrite address ALUS Zero Instruction (9-5) Read Instruction [20-1610 register 1 Read M Read data 1 register 2 Write Read Instruction (4-0) register data 2 Reg2Loc. Write data Registers MemtoReg Read Instruction (31-0) Instruction memory ALU ALU Address data result x=33 u Data (c) Hc Write memory data Instruction (31-0) 32 64 Sign- extend 1 ALU control MemRead Reg Instruction (31-21] ALUOP